1. Field of the Invention
This invention relates to digital interface design, and more particularly, to bus interface design.
2. Description of the Related Art
In many computer systems, master/slave is a widely used communication protocol, according to which two or more devices or processes are typically configured such that one of the devices or processes, designated as a master device or process, has unidirectional control over the other devices. Once a master/slave relationship has been established between select devices and/or processes configured in a system, the direction of control will be from the master device to the slave device, or from the master device to multiple slave devices. Accordingly, in master/slave systems the master device, or host device, typically determines which of the interconnected devices can initiate bus operations. Systems in which all interconnected devices have equal responsibility for initiating, maintaining, and terminating a bus operation are sometimes characterized as peer-to-peer systems. If a master device in a system were configured to allow all other devices to also initiate any and/or all bus transactions, that system would appear as a peer-to-peer system to a user. Such systems may also be referred to as multi-master/slave systems, in which each interconnected device may operate as either a master device or a slave device.
In a multi-master/slave system, typically only one of the master/slave devices can have ownership of a common bus at any one time. Generally, communication between master/slave devices has to be configured in a manner that facilitates the switching of bus ownership between the devices. Multi-master/slave systems may therefore typically operate according to certain designated protocols, with a variety of possible mechanisms built in for each device to request ownership, or control of the bus. Oftentimes, these mechanisms may require processing overhead for each device, or additional connections between each of the devices. However, many multi-master/slave systems may need to limit interconnect wires due to device size or number of I/O pins available on each device. Similarly, many of the same systems may not be able to afford the processing overhead that may be required for establishing communications between the devices that would facilitate seamless bus ownership transfer between the devices.
Many other problems and disadvantages of the prior art will become apparent to one skilled in the art after comparing such prior art with the present invention as described herein.